Kanad Mallik : Homepage

Senior Research Fellow

Semiconductor Group

Department of Materials

E-mail: kanad.mallik@materials.ox.ac.uk

Research Interest

I am an innovative experimental materials scientist. My major research interest is integration of electronic materials to make designer materials for device applications. My focus area has been group III-V semiconductors and silicon.

The most recent highlight of my success is engineering very high resistivity low loss single crystal Czochralski silicon substrates for microwave devices operating at GHz-range frequencies. High resistivity Si substrates from commercially available low resistivity Cz-Si have been made using deep level impurity compensation. Si resistivity of more than 100 kΩcm at room temperatures has been achieved from only 50 Ωcm starting material. The material has near-intrinsic free carrier concentrations, and its insertion loss has been measured to be 3 dB/mm in 1-40 GHz range.

Research Achievements

Invention of very high resistivity Czochralski-silicon (Cz-Si) substrates for microwave applications by deep level gold and manganese doping.

First ever identification of the current mode second breakdown phenomenon as the principle of functioning of the transistorised Marx bank circuits used in pulsed lasers.

First demonstration of the monodisperse nature of lead iodide semiconductor quantum dots grown by chemical routes from analysis of optical absorption spectra.

Demonstration of the mechanism of dislocation density reduction in GaAs by isoelectronic doping for efficient light emission. GaAs epilayers doped with In and Sb were grown by Liquid Phase Epitaxy technique. Optimum isoelectronic dopant concentrations for reduction of dislocation density in the epilayers were found. Observed enhancement of electron mobility was observed by van der Pauw-Hall technique. Deep level electron and hole traps associated with Sb and In were detected by Deep Level Transient Spectroscopy, and photocapacitance.

Demonstration of Fowler-Nordheim tunnelling at room temperatures in 14 nm thick high-k TiO₂ layers in an EPSRC project to develop a new prospective post-CMOS nano-device called, vertical metal-oxide-semiconductor tunnel transistor.

First demonstration of the growth of 3 nm size aluminium quantum dots using electrochemical technique.